1. Field of the Invention
The present invention relates to a semiconductor device, and more specifically to a via structure suitable for arrangement in a layer under a bonding pad of a semiconductor device.
2. Description of the Related Art
With miniaturization and improvement in density of semiconductor devices, transmission delay, signal interference due to crosstalk between adjacent wires, and the like have been examined in wiring technology. In terms of wiring, copper (Cu), which has lower resistance than aluminum (Al), is used instead of Al, and techniques to keep interconnection resistance lower are adopted. In terms of interlayer insulating films, consideration has been made for a technique to reduce electric capacity between wires by using a low-dielectric constant film (low-k film) with a lower relative permittivity than that of a silicon oxidation (SiO2) film.
To realize an insulating film with a small relative permittivity, for example, an insulating film with a relative permittivity k of not more than 3, the density of the insulating film needs to be reduced. However, the reduction of the density of the insulating film reduces the mechanical strength of the insulating film. Therefore, mechanical impact in bonding processes or packaging processes induce detachment or cracks of the insulating film. In some cases, membrane stresses of a plurality of insulating films in multilayer wiring cause cracks in the insulating films. When a strong mechanical impact is applied to a via located in a layer under a bonding pad section in the bonding or packaging process, the via absorbs the impact and is displaced. The low-dielectric constant film with low mechanical strength which is adjacent to the displaced via is then damaged, thus the reliability is lowered.